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compact, high efficiency, high power flash/torch led driver with dual interface adp1653 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features small 6.4 mm 7.2 mm solution 2.2 h power inductor 92% peak efficiency tx masking within 50 s 2.1 a, 12 v power switch pin-selectable interface: 2-bit logic or i 2 c? programmable flash and torch current up to 200 ma in torch mode up to 500 ma in flash mode programmable indicator led current up to 20 ma programmable timer register: up to 820 ms flash timeout 2.75 v to 5.5 v input voltage range low noise, 1.2 mhz pwm operation safety features interrupt output pin fault condition register short-circuit protection output overvoltage protection thermal overload protection integrated current limit and soft start small 3 mm 3 mm, 16-lead lfcsp footprint applications camera-enabled cellular phones, smart phones digital still cameras, camcorders, pdas general description the adp1653 is a very compact, high efficiency, high power, camera-flash led driver optimized for cellular phones. the devices high efficiency and dynamic led current control improve flash brightness and picture quality in dimly lit environments. efficiency peaks at 92% and is higher than charge pump solutions over the li-ion battery range. the device has a dual-mode interface that is configurable to 2-bit logic or an i 2 c interface. the indicator and high power led currents are programmable with external resistors or through the i 2 c interface. to maximize overall flash brightness, the adp1653 offers an input to reduce flash led current in less than 50 s, referred to as the tx mask. tx masking reduces battery stress by scaling back flash led current during an rf transmission. the adp1653 solution requires only four external components in i 2 c mode and fits in a 6.4 mm 7.2 mm space. the part inte- grates multiple safety features such as soft start, flash timeout, output current limit, thermal protection, and overvoltage protection. the adp1653 operates over the ?40c to +125c junction temperature range. typical operating circuit 16 15 14 13 5 6 7 8 12 11 10 9 1 2 3 4 adp1653 4.7f 4.7f one or two leds up to 10.2v 2.2h input vol t age = 2.75v to 5.5v v dd txmask optional sett setf ctrl1/scl ctrl0/sda e n s t r v d d l x s e t i i l e d o u t g n d pgnd intf hpled int 06180-001 off on off on figure 1. pcb layout adp1653 r5 r4 d1 c1 c2 inductor li-ion + gnd l1 input capacitor output capacitor schottky diode pgnd 7.2m m to white leds from white leds l = fdse0312-2r2 cin = grm219r61a475k d1 = bat20j cout = grm21br61c475k 6.4mm optional (tx mask only) 0 6180-036 figure 2.
adp1653 rev. a | page 2 of 24 table of contents features .............................................................................................. 1 applications....................................................................................... 1 general description ......................................................................... 1 typical operating circuit................................................................ 1 pcb layout........................................................................................ 1 revision history ............................................................................... 2 specifications..................................................................................... 3 i 2 c timing specifications............................................................ 5 absolute maximum ratings............................................................ 6 thermal resistance ...................................................................... 6 boundary co ndition.................................................................... 6 esd caution.................................................................................. 6 pin configuration and function descriptions............................. 7 typical performance characteristics ..............................................9 theory of operation ...................................................................... 13 white led driver ...................................................................... 13 2-bit logic interface mode (intf = 1)................................... 14 i 2 c interface mode (intf = 0)................................................. 14 turning on the flash and watchdog timer ........................... 15 safety features ............................................................................ 16 applications information .............................................................. 17 flash-current foldback during transmit pulse ................... 17 external component selection ................................................ 18 pcb board layout...................................................................... 19 outline dimensions ....................................................................... 21 ordering guide .......................................................................... 21 revision history 1/07revision a: initial version
adp1653 rev. a | page 3 of 24 specifications v dd = 3.0 v to 5.5 v, t j = ?40c to +125c, unless otherwise noted. 1 table 1. parameter conditions min typ max unit supply input voltage range 2 3.0 5.5 v undervoltage lockout threshold v dd rising 2.80 2.9 2.95 v v dd falling 2.58 2.7 2.75 v shutdown current en = gnd, t j = ?40c to +85c 0.1 1 a intf = 0, en = v dd , iled register = 0, hpled register = 0, t j = ?40c to +85c 19 45 a soft power-down current intf = 1, en = v dd , (ctrl1, ctrl0) = (0, 0), t j = ?40c to +85c 19 45 a intf = 0, en = v dd , iled register = 001, hpled register = 0 500 700 a intf = 1, (ctrl1, ctrl0) = (0, 1), r seti = 200 k 500 700 a intf = 0, en = v dd , hpled register = 00001 1.6 3 ma operating current 3 intf = 1, (ctrl1, ctrl0) = (1, x) 1.6 3 ma lx leakage t j = ?40c to +85c 0.05 0.5 a hpled leakage t j = ?40c to +85c 0.03 0.5 a thermal shutdown thermal shutdown threshold t j rising 155 c inputs en, str, ctrl1/scl, ctrl0/sda input logic low voltage t j = ?40c to +85c 0.54 v t j = ?40c to +125c 0.48 v input logic high voltage t j = ?40c to +85c 1.26 v t j = ?40c to +125c 1.27 v seti, sett, setf input logic high voltage 1.4 v intf input logic low voltage 4 v dd /2 ? 0.6 v input logic high voltage 4 v dd /2 + 0.6 v int output logic low output voltage i sink = ?3 ma 0.4 v logic high leakage current 0.05 0.5 a seti, sett, setf reference voltage 1.19 1.22 1.24 v indicator led r seti = 25 k 14.5 17.5 21.5 ma intf = 1, seti current source r seti = 200 k 2.0 2.5 3.0 ma iled register = 1 (001 binary), seti = v dd 2.0 2.5 3.0 ma intf = 0 iled register = 7 (111 binary), seti = v dd 14.5 17.5 21.5 ma white led driver lx switching frequency 1.1 1.2 1.3 mhz current limit 1.8 2.1 2.45 a on resistance 250 420 m out soft start ramp 18 v/ms overvoltage threshold v dd rising 9.8 10.15 10.5 v bias current 5 v out = 10 v 12 a
adp1653 rev. a | page 4 of 24 conditions min typ max unit parameter hpled regulation voltage 6 boost active, two high power leds (hpleds) in series 0.23 0.32 0.42 v regulation current intf = 1, torch mode rsett = 50 k or sett = v dd 110 125 145 ma rsett = 125 k 35 50 60 ma flash mode rsetf = 50 k 460 500 550 ma rsetf = 500 k 35 50 60 ma intf = 0, flash mode hpled register = 11111 (binary), setf = v dd 460 500 550 ma hpled register = 11000 (binary), setf = v dd 365 395 435 ma torch mode hpled register = 00110 (binary), setf = v dd 110 125 145 ma hpled register = 00001 (binary), setf = v dd 38 50 60 ma step size for hpled lsb change setf = v dd 15 ma maximum flash timeout intf = 0 or 1, 983,040 oscillator cycles 820 ms setf response (transmit masking function) 7 hpled current = 335 ma to 140 ma 22 s hpled current = 140 ma to 335 ma 24 s 1 all limits at temperature extremes are gua ranteed via correlation using standard stat istical quality control (sqc). typical va lues are at t a = 25c, v dd = 3.6 v. 2 this is the v dd input voltage range over which the rest of the specifications are valid. the part operates as expected until v dd goes below the uvlo threshold. 3 this is the current into the v dd pin. additional current can flow into the indicator led or hpled, depending on the mode selected. 4 intf should be tied to gnd (intf = 0) for i 2 c interface or to v dd (intf = 1) for hardwire interface. all other digital inputs are 1.8 v compatible. 5 this bias current is active only when the high power led and/or indicator led functions are enabled. 6 this specification is not valid during minimum on-time operatio n of the boost converter (one led case) when excess voltage is dropped across the hpled pin. 7 this specification is not production tested but is based on be nch evaluation. it is based on the typical two-led application c ircuit using a 100 k resistor from setf to gnd, and a 160 k resistor to a 1.8 v tx mask logic signal with <1 s rise/fall time. hpled register = 11001 (binary). the inductor current has settled to within 5% of final value.
adp1653 rev. a | page 5 of 24 i 2 c timing specifications table 2. parameter min max unit description f scl 400 khz scl clock frequency t high 0.6 s scl high time t low 1.3 s scl low time t su, dat 100 ns data setup time t hd, dat 1 0 0.9 s data hold time t su, sta 0.6 s setup time for repeated start t hd, sta 0.6 s hold time for start/repeated start t buf 1.3 s bus free time between a stop and a start condition t su, sto 0.6 s setup time for stop condition t r 20 + 0.1 c b 300 ns rise time of scl and sda t f 20 + 0.1 c b 300 ns fall time of scl and sda t sp 0 50 ns pulse width of suppressed spike c b 2 400 pf capacitive load for each bus line 1 a master device must provide a ho ld time of at least 300 ns for the sda signal (ref erred to the v ih minimum of the scl signal) to bridge the undefined region of the scl falling edge. 2 c b is the total capacitance of one bus line in picofarads. sda scl s s = start condition sr = repeated start condition p = stop condition sr p s t low t r t hd, dat t high t su, dat t f t f t su, sta t hd, sta t sp t su, sto t buf t r 06180-002 figure 3. i 2 c interface timing diagram
adp1653 rev. a | page 6 of 24 absolute maximum ratings table 3. parameter rating v dd , ctrl0/sda, ctrl1/scl, intf, en, seti, sett, setf, str, hpled to gnd ?0.3 v to +6 v int , iled to gnd ?0.3 v to + (v dd + 0.3 v) lx, out to gnd ?0.3 v to +12 v pgnd to gnd ?0.3 v to +0.3 v operating ambient temperature range ?40c to +125c 1 operating junction temperature 125c storage temperature range ?65c to +150c soldering conditions jedec j-std-020 1 in applications where high power dissipation and poor thermal resistance are present, the maximu m ambient temperature may have to be derated. maximum ambient temperature (t a(max) ) is dependent on the maximum operating junction temperature (t j(maxop) = 125c), the maximum power dissipation of the device (p d(max) ), and the junction-to-ambient thermal resistance of the part/pac kage in the application ( ja ), using the following equation: t a(max) = t j(maxop) C ( ja x p d(max) ). stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. unless otherwise specified, all other voltages are referenced to gnd. thermal resistance junction-to-ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4-layer board. the junction-to-ambient thermal resistance is dependent on the application and board layout. in applications where high maximum power dissipation exists, attention to thermal board design is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. for more information, see the an-772 application note , a design and manufacturing guide for the lead frame chip scale package (lfcsp). table 4. thermal resistance package type ja unit 16-lead lfcsp 44 c/w maximum power dissipation 1 w boundary condition natural convection, 4-layer board, exposed pad soldered to the pcb. esd caution
adp1653 rev. a | page 7 of 24 pin configuration and fu nction descriptions pin 1 indicator 1 sett 2 setf 3 ctrl1/scl 4 ctrl0/sda 11 int 12 pgnd 10 intf 9hpled 5 s e t i 6 i l e d 7 o u t 8 g n d 1 5 e n 1 6 s t r 1 4 v d d 1 3 l x adp1653 top view (not to scale) 06180-003 figure 4. pin configuration table 5. pin function descriptions pin no. mnemonic description 1 sett set torch input (2-bit logic interface only). sett programs the high power led current in torch mode. an external resistor connected between sett and ground sets the torch cu rrent. when sett is tied high, the current is internally set to 125 ma. in i 2 c mode, this pin is regarded as a no connect. 2 setf set flash input. setf programs the high power led (hpled) current in flash mo de and allows for transmit blanking of the led. in 2-bit logic interface mode, an external re sistor connected between setf and ground sets the flash current. if setf is tied high, the current is set internally to 500 ma. in i 2 c mode, the flash current scales with both the external resistor and the internal hpled bits in the output select register. if setf is tied high, an internal 50 k resistor combined with the hpled bits set the hpled current. 3 ctrl1/scl serial interface clock input. in 2-bit logic interface mode, ctrl1 is the second input bit of the digital interface. in i 2 c mode, scl is the clock input of the i 2 c-compatible serial interface. 4 ctrl0/sda serial interface data input. in 2-bit logic interface mode, ctrl0 is the first input bit of the digital interface. in i 2 c mode, sda is the data input/output of the i 2 c-compatible serial interface. 5 seti set indicator input (2-bit logic interface only). seti programs the indicator led current. an external resistor connected between seti and ground sets the indicator led (iled) current. if seti is tied high, the current is internally set to 10 ma. in i 2 c mode, this pin is regarded as a no connect. 6 iled indicator led input. connect the cathode of the indicator led to the iled pin. connect the anode to the battery or to a voltage rail greater than the led forward voltage. 7 out white led output voltage. out senses the output voltage of the white led step-up converter. at startup, the adp1653 limits the rate of increase of the voltage at out (s oft start) to prevent excessive input inrush current. the out pin features a comparator to detect an overvoltag e condition if the led string is open circuited. connect the anode of the white led(s) to out. connect a 3.3 f or greater capacitor between out and pgnd. 8 gnd analog/digital ground. connect gnd to pgnd at the lfcsp paddle. 9 hpled high power led current regulator. hpled regulates the current of the high power led(s). connect the cathode of the white led string to hpled. 10 intf interface input. intf selects the 2-pin interface mode. intf is driven high to enable ctrl1 and ctrl0 for 2-bit logic interface mode. intf is driven low to enable sda and scl for i 2 c interfacing. 11 int active low interrupt output. int is an open-drain output that transitions fr om high to low to signal that a fault condition has occurred. int should be connected via a pull-up resistor (for example, 10 k to 100 k) to the i/o supply rail and directly to the system processor. when an interrupt is detected, the system processor can read the fault register, using the i 2 c interface for details on the fault condition. 12 pgnd power ground for internal switching fet. 13 lx white led switch node. lx drives the inductor of the white led step-up converter. an inductor and diode connected to lx powers the white leds. 14 v dd supply input. connect the battery between v dd and pgnd. bypass v dd to pgnd with a 4.7 f or greater capacitor. 15 en enable input. driving en high turns on the adp1653. driving en low disables the adp1653 and reduces the input current to less than 1 a. when en is high, disabling th e leds puts the part into sl eep mode, dropping the input current to less than 45 a. 16 str strobe control input (i 2 c interface only). driving str high enables th e flash function of the white led. str also enables the watchdog timer to prevent overstressing the white leds.
adp1653 rev. a | page 8 of 24 table 6. mode selection pin mnemonic value intf = 0 (i 2 c interface) intf = 1 (2-bit logic interface) ctrl0/sda sda ctrl1, ctrl0 = 0, 0 (adp1653 disabled) ctrl1/scl scl ctrl1, ctrl0 = 0, 1 (adp1653 indicator led) ctrl1, ctrl0 = 1, 0 (adp1653 torch mode) ctrl1, ctrl0 = 1, 1 (adp1653 flash mode) low adp1653 disabled adp1653 disabled en high adp1653 enabled adp1653 enabled low flash disabled ignored str high flash enabled ignored low fault conditio n fault condition int high normal operation normal operation resistor ignored 1 seti resistor sets indicator led current 2 seti high i 2 c sets iled current iled current = 10 ma resistor ignored 1 sett resistor sets torch current 2 sett high i 2 c sets torch current torch current = 125 ma resistor setf resistor(s) and i 2 c set flash current and torch current 3 setf resistor(s) set flash current 2 setf high i 2 c sets flash current flash current = 500 ma 1 if a resistor is present on seti or sett in i 2 c mode, it is ignored. both pins should be tied high when operating in i 2 c mode. 2 if a resistor is present, the current is se t by this resistor. if a resistor is not pr esent, the pin must be tied high and a d efault internal current set. 3 if a resistor is present on setf in i 2 c mode, the output current scales with both the i 2 c setting and the external reference current. the setf resistor scales both the flash mode and torch mode currents.
adp1653 rev. a | page 9 of 24 typical performance characteristics 2 3 4 1 channel 3 (v out ) 5v/div channel 4 (str) 5v/div channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-011 40s/div : 138s l = d2812c-2r0 figure 5. startup, two leds flash mode, led current = 335 ma, v dd = 3.2 v 2 3 4 1 channel 3 (v out ) 5v/div channel 4 (str) 5v/div channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-012 40s/div : 175s l = d2812c-2r0 figure 6. startup, two leds flash mode, led current = 335 ma, v dd = 3.6 v 2 3 4 1 channel 3 (v out ) 5v/div channel 4 (scl) 5v/div channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-013 40s/div : 153s l = d2812c-2r0 figure 7. startup, two leds torch mode, led current = 130 ma, v dd = 3.2 v 2 3 4 1 channel 3 (v out ) 5v/div channel 4 (scl) 5v/div channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-014 40s/div : 132s l = d2812c-2r0 figure 8. startup, two leds torch mode, led current = 130 ma, v dd = 3.6 v 2 3 4 1 channel 3 (lx) 5v/div channel 4 (hpled node) 1v/div channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-015 400ns/div l = d2812c-2r0 figure 9. inductor current, two leds flash mode, led current = 335 ma, v dd = 3.6 v 2 3 4 1 channel 3 (lx) 5v/div channel 4 (hpled node) 1v/div channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-016 400ns/div l = d2812c-2r0 figure 10. inductor current, two leds torch mode, led current = 130 ma, v dd = 3.6 v
adp1653 rev. a | page 10 of 24 500 450 400 350 300 250 200 150 100 50 0 0 5 10 15 20 25 30 hpled code i hpled (ma) 06180-037 figure 11. hpled current vs. hpled code, i 2 c mode, setf = v dd 86 70 100 400 led current (ma) efficiency (%) 84 82 80 78 76 74 72 150 200 250 300 350 v dd = 3v v dd = 3.2v v dd = 3.6v v dd = 4.2v 06180-018 l = d2812c-2r0 ds = bat20j d1, d2 = pwf-3 figure 12. efficiency p led /p in , two high power white leds in series 85 80 75 70 65 60 0 500 hpled current (ma) efficiency (%) 100 200 300 400 v dd = 4.2v v dd = 3v v dd = 3.6v v dd = 3.2v 06180-020 l = lqm31p-2r2 ds = bat20j d1 = pwf-3 figure 13. efficiency p led /p in , one high power white led : 22.4s 2 3 4 1 channel 3 (v out ) 5v/div channel 4 (tx mask) 5v/div channel 1 (ibat) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-021 40s/div figure 14. tx masking response, tx mask 0 v to1.8 v, ihpled = 335 ma to 140 ma, v dd = 3.2 v : 23.2s 2 3 4 1 channel 3 (v out ) 5v/div channel 4 (tx mask) 5v/div channel 1 (ibat) 0.5a/div channel 2 (i hpled ) 0.2a/div 06180-022 40s/div figure 15. tx masking response, tx mask 0 v to1.8 v, i hpled = 140 ma to 335 ma, v dd = 3.2 v 2 3 4 1 channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div channel 3 (int) 5v/div channel 4 (str) 5v/div 06180-023 100ms/div figure 16. flash timed mode, two leds, timer = 820 ms, i hpled = 380 ma, v dd = 3.6 v
adp1653 rev. a | page 11 of 24 2 3 4 1 channel 1 (i l ) 0.5a/div channel 2 (i hpled ) 0.2a/div channel 3 (int) 5v/div channel 4 (str) 5v/div 06180-024 100ms/div figure 17. flash untimed mode, two leds, timer = 300 ms, i hpled = 380 ma, v dd = 3.6 v 1.5 1.7 1.9 2.1 2.3 2.5 ?40 10 60 110 low medium high 06180-040 temperature (c) lx current limit (a) figure 18. typical current limit vs. temperature; low, medium, and high current limit parts 0.20 0 ?40 125 temperature (c) shutdown current (a) 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 10 60 110 v dd = 3.6v v dd = 3v v dd = 5.5v 06180-026 figure 19. shutdown current vs. temperature, en = 0 v 35 0 ?50 125 temperature (c) i q (a) 0 50 100 06180-027 30 25 20 15 10 5 v dd = 3v v dd = 3.6v v dd = 5.5v figure 20. quiescent current vs. temperature, en = v dd , led functions disabled 1.6 0 06 v dd (v) i q (ma) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 12345 iled enabled i q = 21.5 a 06180-028 figure 21. quiescent current vs. temperature, v dd swept from 5.5 v to 0 v, iled active at 2.5 ma until uvlo threshold 1.220 1.215 1.210 1.205 1.200 1.195 1.190 1.185 1.180 1.175 1.170 ?40 ?15 10 35 60 85 110 temperature (c) frequency (mhz) 3v 3.6v 5.5v 06180-029 figure 22. oscillator freque ncy vs. temperature vs. v dd
adp1653 rev. a | page 12 of 24 127.5 122.5 ?40 temperature (c) i hpled (ma) 10 60 110 127.0 126.5 126.0 125.5 125.0 124.5 124.0 123.5 123.0 5.5v 3.6v 3v 06180-031 figure 23. hpled regulation, set at 125 ma, hpled register = 00110 (binary), setf = v dd 353 347 ?40 temperature (c) i hpled (ma) 10 60 110 352 351 350 349 348 3.6v 5.5v 3v 06180-032 figure 24. hpled regulation, set at 350 ma, hpled register = 10101 (binary), setf = v dd
adp1653 rev. a | page 13 of 24 theory of operation the adp1653 is a high power, white led driver ideal for driving white leds for use as a camera flash. the adp1653 includes a step-up converter and a current regulator suitable for powering one, or up to three, high power, white leds. a second lower current sink allows an indicator led to be driven with 2.5 ma to 17.5 ma current. the adp1653 responds to a 2-pin control interface that can operate in two separate pin-selectable modes. tying the intf pin high enables a 2-bit logic hardwire interface. tying the intf pin low enables the i 2 c interface. white led driver the adp1653 drives a step-up converter to power typically one or two series-connected, high power leds. the white led driver regulates the high power led current for accurate brightness control. the adp1653 uses an integrated nfet current regulator that drops the voltage when the power led forward voltage is less than the battery voltage. when the required led voltage is greater than the battery voltage, the nfet current regulator voltage at the hpled pin is approxi- mately 320 mv, and the step-up converter applies the appropriate voltage to out, allowing the led to conduct the regulated current. when the white led is turned on, the step-up converter output voltage slew is limited to 18 v/ms to prevent excessive battery current while charging the output capacitor. the output voltage of the step-up converter is sensed at out. if the output voltage exceeds the 10.15 v (typical) limit, the white led converter turns off to indicate that a fault condition has occurred through the int output and system registers. this feature prevents damage due to an overvoltage if the white led string fails with an open- circuit condition. setting the led regulation currents depends on the 2-pin control interface used, as described in the following sections. 16 15 4 3 iled control 6 7 14 interface/ control 11 10 pwm controller oscillator fault register thermal protection 1 2 5 5200 = torch 20800 = flash 400 = iled 12 tx mask (optional) watchdog timer pgnd hpled gnd 1.22v/rf 1.22v/rt 1.22v/ri rf rt ri setf 1.22v i ref (flash) i ref (torch) i ref (iled) 1.22v 1.22v 1.22v 1.22v 1.22v sett seti intf int v dd /2 i/o v dd str en ctrl0/sda ctrl1/scl 10.15v 2.7v ovp uvlo iled out v dd 13 7 9 ? + 0.32v out cout d1 pgnd cin pgnd l1 lx high power led control 8 v dd = 2.75 v to 5.5v bias 0 6180-004 figure 25. detailed block diagram
adp1653 rev. a | page 14 of 24 2-bit logic interface mode (intf = 1) in 2-bit logic interface mode, the two control pins, ctrl1 and ctrl0, select whether the part is disabled or operating in indicator led mode, torch mode, or flash mode, as outlined in table 7 . table 7. 2-bit logic interface mode selection intf = 1 ctrl1 ctrl0 led current setting pin default current (setx = h) disabled 0 0 C C iled 0 1 seti iled = 10 ma torch 1 0 sett hpled = 125 ma flash 1 1 setf hpled = 500 ma the led current levels for indicator led mode, torch mode, and flash mode operation are set with separate external resistors tied between ground and the seti, sett, and setf pins, respectively. the resulting reference current into each setx pin is equal to 1.22 v/r setx . the reference current multiplied by a fixed ratio sets the relevant led current. table 8. reference current to led current scaling intf = 1 ctrl1 ctrl0 led current disabled 0 0 C iled 0 1 i ref (seti) 400 torch 1 0 i ref (sett) 5200 flash 1 1 i ref (setf) 20,800 alternatively, a default internal current setting is used by tying the setx pin high. the default current for each mode of operation approximately equals the current obtained with a 50 k resistor tied from the setx pin to ground. consequently, the led current resulting from an external resistor setx is given by the following equation: setx default led r ii k 50 = (1) where i default is the led current resulting from tying the setx pin high. the values of i default are given in table 7 for indicator led mode (seti), torch mode (sett), and flash mode (setf) operation. for accurate led current settings, the minimum setx resistor values should be 25 k (seti, sett) or 50 k (setf). the flash current can be quickly reduced with an external logic signal (typically 1.8 v logic) by adding a second external resistor from the setf pin to the logic signal. bringing this digital input from low to high toggles the flash from normal to reduced current mode by reducing the reference current supplied to the adp1653 via the setf pin (see the applications information section). i 2 c interface mode (intf = 0) the adp1653 includes an i 2 c-compatible serial interface for control of led current, as well as for readback of system status registers. the i 2 c chip address is 0x60 (0110 0000 (binary) in write mode). figure 26 illustrates the i 2 c write sequence. the subaddress content selects which of the four adp1653 registers is written to. figure 27 shows the i 2 c read sequence. the adp1653 sends the data from the register denoted by the subaddress. in this case, the fault register is read (reg3). the register definitions are shown in figure 28 . the lowest bit number (0) represents the least significant bit, and the highest bit number (7) represents the most significant bit. subaddress chip address st0110000 0 0 0sp 0=write adp1653 ack adp1653 ack adp1653 receives data adp1653 ack 06180-038 0 figure 26. i 2 c write sequence subaddress chip address chip address st0110000 0000000110st0110000 0 1sp 1=re a d adp1653 no ack adp1653 sends data adp1653 ack adp1653 ack adp1653 ack 06180-039 0=write 0 1 figure 2 i 2 c ead seuence
adp1653 rev. a | page 15 of 24 unused unused unused out_sel output select config timer configuration sw_strobe software strobe fault fault conditions reg0 reg1 reg2 reg3 hpled<4:0> high power led current iled<2:0> indicator led current tmr_set<3:0> timer period setting tmr_cfg timer configuration sw_strobe software strobe enable flt_ot over temperature fault flt_ov over voltage fault flt_tmr timeout fault d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 d7 d6 d5 d4 d3 d2 d1 d0 06180-005 flt_scp short circuit fault figure 28. i 2 c register assignments the led regulation current levels are controlled by writing to the iled and hpled registers. if the iled register is set to 0, the iled regulator is turned off and no current flows through the indicator led. if the iled register is programmed from 1 (001 binary) to 7 (111 binary), the indicator led is continuously on, with a current scaled to the register setting given by i iled = 2.5 ma code (2) where code is the iled register setting. therefore, the iled current can be programmed between 2.5 ma and 17.5 ma, using the full range of codes. if the hpled register is set to 0, the hpled regulator is turned off, and no current flows through the high power led(s). if the hpled register is programmed from 1 (00001 binary) to 11 (01011 binary), the regulator is in torch mode, and the hpled remains continuously on, independent of the state of str. if the hpled register is programmed between 12 (01100 binary) and 31 (11111 binary), the hpled regulator remains off until enabled through the strobe input (str) or a software strobe command. to program a desired hpled current with setf tied high, use the following equation: i hpled = 35 ma + code 15 ma (3) where code is the hpled register setting. therefore, the hpled torch current can be programmed between 50 ma and 200 ma for code 1 to code 11, and the hpled flash current can be programmed between 215 ma and 500 ma for code 12 to code 31. additionally, the hpled current can be adjusted with an external resistor. this feature is primarily intended for limiting the led flash current in handset applications when the phones power amplifier transmits, but it can also be used to modify the hpled current settings. if an external setf resistor is present, the hpled current is given by setf hpled r code i k 50 ma)15 ma35( += (4) turning on the flash and watchdog timer a watchdog timer is always active in flash mode to prevent overstress of the hpled. in 2-bit logic interface mode, users select flash operation by setting the ctrl1 pin and the ctrl0 pin high. the watchdog timer in this mode is fixed at 0.82 sec. bringing the ctrlx pins to another state terminates the flash. if the state of the ctrlx pins remains high for longer than 0.82 sec, flash is automatically disabled by the watchdog timer, and the interrupt pin ( int ) goes low to indicate a fault.
adp1653 rev. a | page 16 of 24 in i 2 c mode, users select flash operation by programming the hpled register between 12 (01100 binary) and 31 (11111 binary). the flash does not turn on until a strobe command is given by either pulling the str pin high or by writing a software strobe command to the appropriate i 2 c register. there are additional settings for the watchdog timer in i 2 c mode. the strobe command operates in one of two watchdog timer modes, timed flash and user-controlled flash, that are controlled via the state of the timeout configuration (tmr_cfg) bit of the config register. if tmr_cfg is set (1), the flash operates in timed mode. in timed flash, a rising edge on str turns on the flash. the flash remains on until the internal timeout occurs, which is set by the tmr_set bits of the config register, according to the following equation: t flash = 820 ms ? code 54.6 ms (5) where code ranges from 0 (0000 binary) to 15 (1111 binary), allowing for flash periods ranging from 54 ms to 820 ms. if tmr_cfg is not set (0), the flash operates in user-controlled timer mode. in user-controlled timer mode, the flash remains on as long as str is held high. if str remains high longer than t flash (if tmr_set = 0, t flash = 820 ms), the flash is turned off and a fault is set in the watchdog timeout (flt_tmr) bit of the fault register. the adp1653 also offers a software strobe option, allowing the user to turn on the flash directly through the i 2 c interface without pulling the str pin high. setting the sw_strobe register bit to 1 initiates a flash cycle. the strobe can operate in either timed or user-controlled mode, as previously described. safety features interrupts for critical system conditions, such as output overvoltage, watchdog timeout, and overtemperature conditions, the adp1653 indicates that an interrupt event has occurred by asserting the active-low interrupt output int . int is an open-drain output and should be pulled up to the i/o voltage rail by using a resistor. in i 2 c interface mode, the system baseband processor can read the fault register through the i 2 c interface to determine the nature of the fault condition after sensing that int has gone low. users can clear a fault by writing 0x00 to the out_sel register. this brings int high and clears the fault register. in 2-bit logic interface mode, int goes low for the same fault conditions, but i 2 c register readback is not available. to clear a fault, set ctrl1 and ctrl0 low. overvoltage fault the adp1653 contains a comparator at the out pin that monitors the voltage from the high power led(s) to pgnd. if the voltage exceeds 10.15 v (typical), the adp1653 shuts down (i q < 45 a) and int goes low. in i 2 c mode, bit d0 in the fault register (flt_ov) is read back as high. the adp1653 is disabled, and int remains low until the fault is cleared. timeout fault if the 2-bit logic interface is used, the maximum duration for flash being enabled (ctrl1/ctrl0 =1) is preset to 820 ms. if ctrl1 and ctrl0 remain high for longer than 820 ms, int goes low and the adp1653 is disabled. in i 2 c mode, if tmr_cfg is not set (0), and str remains high for longer than t flash (see equation 5), int goes low and the flt_tmr bit in the fault register is read back as high. the adp1653 is disabled, and int remains low until the fault is cleared. overtemperature fault if the junction temperature of the adp1653 rises above 155c, a thermal protection circuit shuts down the led driver and brings int low. in i 2 c mode, bit d2 (flt_ot) of the fault register is read back as high. the adp1653 is disabled, and int remains low until the fault is cleared. short-circuit fault the hpled pin features short-circuit protection that disables the adp1653 if it detects a short circuit to ground at the cathode of the led(s). the adp1653 monitors the hpled voltage once the part is enabled in torch mode. if after 820 ms the hpled pin remains grounded, a short circuit is detected. int goes low, and bit d3 (flt_scp) of the fault register is read back as high. input undervoltage the adp1653 includes an input undervoltage lockout circuit. if the battery voltage drops below the 2.7 v (typical) input uvlo threshold, the adp1653 shuts down and the input current drops to less than 45 a to prevent deep discharge of the battery. in this case, the system register information is lost, and when power is reapplied, a power-on reset circuit resets the registers to their default conditions. current limit the internal lx switch limits battery current by ensuring that the peak inductor current does not exceed 2.1 a (typical). if the seti, sett, or setf pins accidentally connect to ground, reference current is limited to a maximum of 1 ma.
adp1653 rev. a | page 17 of 24 applications information flash-current foldback during transmit pulse the adp1653 allows a fast, 1.8 v logic-enabled foldback of the flash current, typically enabled shortly before an rf transmit pulse. this feature extends the life of the battery by preventing overstress of the battery cell. it also extends the life of the phone by reducing the maximum instantaneous system current that can occur, allowing a lower battery operating voltage limit. 2-bit logic interface mode (intf = 1) in 2-bit logic interface mode, the flash current is set with an external resistor. the 1.22 v reference voltage is buffered to the setf pin, generating a reference current across an external setf resistor. this reference current is multiplied by a fixed gain to set the flash current in the hpled. a 1.8 v compatible logic signal selects normal or reduced flash current by adjusting the reference current, as shown in figure 29 and figure 30 . setf 1.22v 1.22v r1 r2 iref 1.22v/r1 1.22v/r2 current mirrors digital output txmask = 0v 06180-006 figure 29. flash mode current foldback (normal operation with r2 grounded through digital control signal) full-current flash mode has a reference current of r2r1 r2r1 r2r1 i 0ref + == )(v22.1 // v22.1 _ (6) the reference current is multiplied by a fixed gain to give the actual flash current (see table 8 ). setf 1.22v 1.22v r1 r2 iref 1.22v/r1 0.6v/r2 current mirrors digital output txmask = 1.8v 1.8v 06180-007 figure 30. flash mode cu rrent foldback with 1.8 v signal applied to r2 a logic high to r2 changes the direction of the current in r2. i ref = i r1 ? i r2 (7) r2 v r1 i masktx ref v22.1 v22.1 ? ?= (8) i hpled = i ref 20,800 (9) the ratio of full flash current to reduced flash current for a 1.8 v logic signal is approximately 2 r1 r2 r1r2 flash reduced flashfull ? + = (10) if r1 = r2 = 100 k, maximum flash current is 500 ma, and reduced flash current is 125 ma. i 2 c mode (intf = 0) to allow flash current foldback in i 2 c mode, the user should connect a resistor between setf and ground, and another resistor from setf to the logic input, as shown in figure 29 and figure 30 . operation is the same as for the 2-bit logic interface mode, except the flash current is additionally scaled by setting the hpled bits in the out_sel register. full-current flash mode (tx mask = 0 v) has a flash current of setf hpled r code i k 50 ma)15 ma35( += (11) where: r setf is a parallel combination of r1 and r2. code is the hpled register setting. bring the tx mask voltage high for reduced reference current. therefore, the reduced led current is i hpled (see equation 13). r2 v r1 i masktx ref v22.1 v22.1 ? ?= (12) v22.1 k 50 ma)15 ma35( ref hpled i code i += (13)
adp1653 rev. a | page 18 of 24 external component selection selecting the inductor the adp1653 step-up converter increases the battery voltage to allow driving one, two, or three leds, whose combined voltage drop is higher than the battery voltage plus the 0.32 v (typical) current source headroom voltage. this allows the converter to regulate the hpled current over the entire battery voltage range and with a wide variation of led forward voltage. users should choose an inductor value such that the inductor ripple current is approximately 2/5th of the maximum dc input load current. in general, lower inductance values have higher saturation current and lower series resistance for a given physical size. for most applications, an inductor in the range of 1.5 h to 3.3 h works well. to determine the inductor ripple current, users should first calculate the switch duty cycle for the step-up converter, which is determined by the input voltage (v in ), output voltage (v out ), and schottky forward voltage (v f ). v out equals the led voltage drop plus 320 mv (typical) overhead for the hpled current regulator. d vv v f out in ?= + 1 (14) solving for d f out inf out f out in vv v v v vv v d + ?+ = + ?= 1 the hpled (output) current is regulated as low as 50 ma (torch mode) and as high as 500 ma (flash mode). the maximum dc input current is related to the maximum dc output current by the following equation: v v ii in out max out max in 1 )( )( ? ? ? ? ? ? ? ? = (15) where is efficiency (assume 0.80 in the two-led case). choose the initial inductor value by using the equation ? ? ? ? ? ? ? ? + ?+ = f out inf out sw l in vv vvv fi v l (16) where: l is the inductor value (reduce l to reduce solution size). f sw is the switching frequency. i l is the inductor ripple current, typically 2/5th of the maximum dc input current. v f is the forward voltage of the schottky diode. the inductor saturation current should be greater than the sum of the dc input current and half the inductor ripple current. a reduction in the effective inductance due to saturation increases the inductor current ripple but improves loop stability, reducing the amount of output capacitance required. ensure that the peak inductor current (dc + 1/2 of inductor ripple) is less than the lx minimum current limit (1.5 a). selecting the input capacitor the adp1653 requires an input bypass capacitor to supply transient currents while maintaining constant input and output voltage. the input capacitor carries the input ripple current, allowing the input power source to supply only the dc current. use an input capacitor with sufficient ripple current rating to handle the inductor ripple. a 4.7 f x5r/x7r ceramic capacitor rated for 6.3 v is the minimum recommended input capacitor. increased input capacitance reduces the amplitude of the switching frequency ripple on the battery. because of the dc bias charac- teristics of ceramic capacitors, a 0603, 6.3 v x5r/x7r, 10 f ceramic capacitor is preferable. selecting the diode the adp1653 is a nonsynchronous boost and, as such, requires an external schottky rectifier to conduct the inductor current to the output capacitor and hpleds when the lx switch is off. ensure that the schottky peak current rating is greater than the maximum inductor current. choose a diode with an average current rating that is significantly larger than the maximum led current. to prevent thermal runaway, derate the schottky rectifier to ensure reliable operation at high junction temperatures. to achieve the best efficiency, select a schottky diode with a low v f . selecting the output capacitor the output capacitor maintains the output voltage and supplies the hpled current when the lx switch is on. it also stabilizes the loop. a 4.7 f, 16 v x5r/x7r ceramic capacitor is generally recommended. the minimum required capacitance for loop stability for the two-led and one-led cases is shown in figure 31 and figure 32 , respectively. choose a capacitor with a capacitance greater than the minimum shown in figure 31 and figure 32 for the worst case dc bias voltage and temperature condition. note that dc bias characterization data is available from capacitor manufacturers and should be taken into account when selecting input and output capacitors.
adp1653 rev. a | page 19 of 24 4.5 0 0 hpled current, 2 led case (ma) minimum capacitance (f) 5 0 0 0 6180-033 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 100 200 300 400 2.2 h + 20% 3.3 h+20% out = 6.3v, v dd =3.2v out = 8.3v, v dd =3.2v out = 6.3v, v dd =4.2v out = 8.3v, v dd =4.2v out = 6.3v, v dd =3.2v out = 8.3v, v dd =3.2v out = 6.3v, v dd =4.2v out = 8.3v, v dd =4.2v figure 31. minimum output capaci tance for l = 3.3 h + 20% and l = 2.2 h + 20% for two-led designs 4.0 0 0 500 hpled current, 1 led case (ma) minimum capacitance (f) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 50 100 150 200 250 300 350 400 450 2.2 h + 20% 06180-030 out = 3.3v, v dd =3.2v out = 4.3v, v dd =3.2v out = 4.3v, v dd =4.2v figure 32. minimum output capacitance for l = 2.2 h + 20% for one-led design 5.0 0 01 dc bias (v) capacitance (f) 2 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 246810 ?40c (10v) +85c (10v) 0 6180-008 figure 33. dc bias characteristic of a 10 v, 4.7 f ceramic capacitor pcb board layout good pcb layout is important to maximize efficiency and to minimize noise and electromagnetic interference (emi). an example pcb layout is shown in figure 34 . refer to the following guidelines for adjustment to the suggested layout. the high current paths are shown in figure 35 . place components that are on high current paths first. to minimize large current loops, place the input capacitor, inductor, schottky diode, and output capacitor as close as possible to each other and to the adp1653 using wide tracks (use shapes where possible). use separate analog and power ground planes. the analog ground plane is used to ground the seti, sett, and setf resistors and for any digital connections (that is, intf = 0 = agnd). use the power ground plane to ground the power components. connect the input capacitor, output capacitor, and the pgnd pin (pin 12) to the pgnd plane. if it is not possible to make the pgnd plane continuous, use a number of low inductance vias to connect the planes. connect the agnd and pgnd planes at the paddle or close to the paddle of the adp1653. the seti, sett, and setf resistors set a small reference current that generates the led current. to minimize noise and current error, connect the seti, sett, and setf resistors as close as possible to the adp1653. connect the other end of the resistors directly to the agnd plane. connect the output capacitor to the high power led(s), using a wide, low resistance trace. connect the bottom of the led string back to the hpled pin (pin 9) with a wide trace. the gnd pin (pin 8) is connected to the source of the current regulator nfet. ensure that there is a low impedance back to the battery for the high power led current by connecting the gnd pin to the pgnd plane with a low impedance via(s) close to the gnd pin. the out pin is used for soft start and contains a comparator for overvoltage protection. connect the output capacitor back to the out pin (pin 7) with a direct trace. the trace does not need to be wide.
adp1653 rev. a | page 20 of 24 inductor v in gnd l1 c1 input capacitor c2 output capacitor schottky diode d1 high-power led d3 high-power led d2 indicator led d4 sett resistor r6 setf resistor r5 txmask resistor r4 seti resistor r7 adp1653 agnd plane pgnd plane pgnd pgnd connect agnd to pgnd close to ic. this is the gnd return path for hpled current, so a reasonably large via should be used to connect agnd to pgnd plane. 06180-034 figure 34. example layout of adp1653 driving two white leds, pink = gnd layer, gray/green = top layer (a one-led layout is simi lar) 16 15 14 13 5 6 7 8 12 11 10 9 1 2 3 4 adp1653 4.7f 4.7f one or two leds 2.2h input volt a ge = 2.75v to 5.5v v dd tx mask optional sett setf ctrl1/scl ctrl0/sda e n s t r v d d l x s e t i i l e d o u t g n d pgnd intf hpled int 06180-035 figure 35. typical applications circuit (high current lines are shown in bold)
adp1653 rev. a | page 21 of 24 outline dimensions 1 0.50 bsc 0.60 max p i n 1 i n d i c a t o r 1.50 ref 0.50 0.40 0.30 0.25 min 0.45 2.75 bsc sq top view 12 max 0.80 max 0.65 typ seating plane pin 1 indicato r 0.90 0.85 0.80 0.30 0.23 0.18 0.05 max 0.02 nom 0.20 ref 3.00 bsc sq * 1.65 1.50 sq 1.35 16 5 13 8 9 12 4 exposed pad (bottom view) * compliant to jedec standards mo-220-veed-2 except for exposed pad dimension. figure 36. 16-lead lead frame chip scale package [lfcsp_vq] 3 mm x 3 mm body, very thin quad (cp-16-3) dimensions shown in millimeters ordering guide model temperature range package description package option branding adp1653acpz-r2 1 C40c to +125c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 l3h adp1653acpz-r7 1 C40c to +125c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-3 l3h adp1653-evalz 1 evaluation board 1 z = pb-free part.
adp1653 rev. a | page 22 of 24 notes
adp1653 rev. a | page 23 of 24 notes
adp1653 rev. a | page 24 of 24 notes ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d06180-0-1/07(a)

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